Schottky Diodes, HEMTs Integrated with GaN IC

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Taking gallium nitride power ICs to the next level, researchers at Imec report co-integration of Schottky barrier diodes and high-electron-mobility transistors (HEMTs) on a smart power platform.

The advance, reported during this week’s International Electron Devices Meeting, combines high-performance Schottky barrier diodes and depletion-mode HEMTs on a p-channel GaN, HEMT-based, 200-V, silicon-on-insulator power IC. The platform was developed on a 200-mm substrate, the researchers said.

The combination enables chip designs with increased functionality and performance. Imec said the integration paves the way for smaller, more efficient DC/DC and point-of-load converters.

“The d-mode HEMT allows improvement of the logic [and] analog functions by replacing the inverting functions from RTL [Resistor/Transistor Logic] by DCFL [Direct-Coupled FET Logic], which improves the pull-up characteristics of the inverting gates,” Stefaan Decoutere, Imec’s program director for GaN technology, noted in an interview.

“There are no good p-channel devices in GaN–the mobility is about 60 times lower of holes compared to electrons–such that complementary logic like in CMOS is not realistic. The low-voltage Schottky diode offers additional functionality on-chip, such as level shifting and clamping. The high-voltage power Schottky diode can be used to improve the third quadrant operation of the low-side switch” for better power efficiency, Decoutere added.

The next step is developing a GaN IC prototype and a process transfer to a less expensive 200-mm substrate. Previously, “GaN-on-Si was processed on smaller diameter wafers [4 and 6 inch], and more fabs have moved their GaN technology to 200 millimeter,” Decoutere said.

The challenge for larger diameter GaN-on-Si substrates is the mechanical stability of substrates, given the  mismatch between the coefficient of thermal expansion of the GaN/AlGaN layers and the underlying substrate. “With proper design of the buffer, [such as] the use of superlattice buffers, and improved MOCVD deposition tools, this mechanical stability issue has been addressed, making it feasible to process GaN on 200-mm substrates,” the Imec researcher said.

GaN is a wide-bandgap semiconductor that is gaining traction for power applications previously dominated by silicon-based components. High efficiency, the ability to operate at greater switching frequencies and temperatures than silicon and a smaller footprint are among the attributes enabling GaN to handle demanding power applications.

GaN HEMTs have attracted attention for a range of applications, including high-frequency power amplifiers and high-voltage devices used in power electronics. Development is currently focused on GaN HEMTs with Si-based substrates to reduce cost and speed integration with Si-based components. Due to both lattice and thermal mismatches between GaN and Si, defects frequently result at the GaN-Si interface.

GaN HEMTs have favorable Rds (on) and figure-of-merit (FOM) values. FOM can be four to ten times lower than that of super-junction FETs, depending on voltage and current rating. As a result, GaN is well suited to high-frequency applications. Conduction losses are reduced and efficiency is increased when a GaN HEMT with a low RDS (on) value is used.

There is also no reverse recovery charge in GaN HEMTs since they lack an inherent body diode. Devices exhibit variable characteristics depending on the gate voltage and are capable of reverse conduction. Anti-parallel diodes are not required, meaning reverse conduction capability is a benefit over typical IGBTs at the system level. By eliminating reverse recovery losses, GaN allows efficient operation even at high switching frequencies.

Driving GaN devices remains more difficult than driving a MOSFET since GaN requires faster turn-on and -off times (meaning higher dV/dt) as well as a lower and more tightly controlled gate turn-on voltage. Optimizing gate-loop inductance, power supply inductance, gate resistors as well as drain and source inductances are key challenges for driving GaN at the board level. Designers must concentrate on dead-time control, dV/dt immunity, negative source voltage and overcharging at the gate-driver level. Symmetry between the high and low sides of the gate driver is another important consideration since it achieves less than 1-ns delay matching, thereby reducing dead time.

GaN power electronics remain mostly discrete components requiring an external driver IC to generate switching signals. However, fast GaN switching speeds can be leveraged when integrating driver functions into a monolithic device.

Among the obstacles to developing GaN power ICs is the lack of GaN p-channel devices with acceptable performance. CMOS technology uses symmetrical pairs of p- and n-type FETs based on the mobility of holes and electrons in both. However, for GaN, the mobility of holes is about 60 times worse than that of the electrons. That means a p-channel device, where gaps are the main carriers, would be 60 times larger than an n-channel counterpart, making it highly inefficient. One alternative is replacing the P-MOS with a resistor-transistor, allowing for tradeoffs between switching time and power consumption (see below).

Process cross-sections of the high-voltage components fabricated on 200 mm GaN-on SOI substrates (a) e-mode pGaN-HEMT (b) d-mode MIS-HEMT, (c) Schottky barrier diode. All devices include metal field plates based on front-end and interconnect metal layers and separated by dielectric layers.


A diced GaN wafer.

Imec claims it has improved performance through a combination of e- and d-mode HEMT devices. According to Decoutere, the extension of the e-mode HEMT functional platform on SOI with co-integrated d-mode HEMTs enables improved speed and reduced power dissipation of the circuits.

Another critical component for co-integration into GaN power ICs is a Schottky barrier diode. Schottky GaN diodes combine higher blocking voltages with lower switching losses than silicon. According to Imec, the GaN-IC platform is available for prototyping through its multi-project-wafer service, and is available to its partners.

The goal is development of a 650-V version for high-voltage power switching and conversion applications along with fast chargers for smartphones, tablets and laptops.

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